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Approaches for Hardware Fault Mitigation in Multicore Processors

Name: Approaches for Hardware Fault Mitigation in Multicore Processors
Brand: LAP Lambert Academic Publishing
SKU: 07084489
Price: 52.89 EUR
Availability: InStock
Author: Daniel Sánchez
ISBN: 9783846554630

Resilient systems with unreliable devices

Daniel Sánchez

Lingua

Inglese

Libro In brossura

Codice Libristo: 07084489

Casa editrice LAP Lambert Academic Publishing, novembre 2010

This thesis addresses one of the fundamental challenges emerging in microprocessor design, namely ha... Descrizione completa

Codice Libristo: 07084489

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52.89 €

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This thesis addresses one of the fundamental challenges emerging in microprocessor design, namely hardware reliability and resilience. Since inception in the 70's, microprocessors have primarily benefited from technological advancements in semiconductors fabrication allowing for an exponential increase in computing capability of chips by shrinking transistors sizes. Unfortunately, forecasts indicate that further shrinking in size will be accompanied by variability in transistor performance and reliability. This thesis proposes novel designs and enhancements to provide hardware reliability for parallel workloads. In particular, it is provided noteworthy improvements in Redundant Multi Threading (RMT) fault-tolerant approaches, as well as novel Expected Miss Ratio (EMR) model to determine the impact of hard faults on cache memories.